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A Convolutionally-Coded Adaptive CDMA Receiver Architecture

Lori Lucke
Minnetronix, Inc.
1635 Energy Park Drive
St. Paul, MN 55108
lelucke@minnetronix.com

Sabera Kazi
Honeywell Technology Center
3660 Technology Drive
Minneapolis, Minnesota 55418
Kazi_Sabera@htc.honeywell.com


ABSTRACT

Several CDMA receiver architectures have been proposed. One of these new receivers consists of an LMS architecture and can adapt to varying channel characteristics. More recently, we proposed the use of coding techniques to improve the performance of the CDMA receiver. In this paper, we analyze the resources required to implement both the matched and LMS filter structures. We calculate the overhead necessary to achieve the improved performance using the LMS structures. Next we analyze the overhead necessary to add coding to the receiver structure. We demonstrate that with minimal resource overhead, the convolutionally-coded system has significantly improved signal to noise ratio over a conventional CDMA receiver.

Introduction

The simplest code division multiple access (CDMA) receiver utilizes a matching filter to separate the appropriate output signal from the received baseband signal. Two problems exist with wireless CDMA systems: the near-far effect and the multipath problem. These problems greatly increase the bit error rate of the data demodulated by a conventional CDMA receiver. A solution to these problems is the use of adaptive filter receivers [2]. The adaptive filter receiver has the capability to adapt to varying channel characteristics.

More recently we proposed the addition of coding within the CDMA filter receiver to further improve the filter performance [1]. We know that error correction codes can improve the performance of digital systems by lowering the required signal-to-noise ratio while increasing the required bandwidth. In fact, with very low rate convolutional codes in additive white Gaussian noise channels, it is possible to achieve the ultimate channel capacity [3]. By using convolutional codes within the CDMA filter receiver we were able to demonstrate improved bit error rates (BERs) at equivalent signal-to-noise ratios.

In this paper we analyze the resource requirements of the receiver architectures needed to implement the CDMA receiver models. We begin by analyzing the matched filter and LMS filter implementations. With the LMS structure it is possible to achieve BERs that are not possible with the matched filter structure. We calculate the overhead necessary to reach this performance level. Furthermore, the use of coding substantially improves performance for both the LMS and matched filter structures. We demonstrate that this additional performance comes at very minimal cost especially when compared to the cost of the LMS structure.

CDMA Models

The structures of the matched filter and the adaptive filter CDMA receivers are well known [2]. In this section, we briefly describe the additional blocks needed within these structures to support convolutionally coded signals.

The convolutionally coded baseband CDMA transmitter is shown in Fig.1. In this model, the data source produces the transmitted data stream. A k bit input is shifted into the convolutional encoder and an n bit output symbol is produced (rate k/n coder) [3]. Here k=1,and n=2. We used a rate ½ encoder with 4 states. Each bit of the coded symbol spans one complete PN (pseudo-noise) sequence period. Demodulation of coded CDMA signals is conventionally achieved with a matched filter receiver, as shown in Fig.2.

Figure 1: Convolutionally coded CDMA transmitter.

The adaptive LMS filter receiver for the convolutionally coded CDMA system is shown in Fig.3. The receiver consists of an LMS filter and a Viterbi decoder.

Figure 2: Conventional receiver for the convolutionally coded CDMA system.

Here, we use an N-tap adaptive LMS filter receiver to minimize the mean squared error (MSE) between the desired signal and the received signal when N is the length of the PN sequence. We assume that the receiver has the knowledge of the PN sequence.

Figure 3: Adaptive LMS filter receiver for the convolutionally coded CDMA system.

We have shown in [1] that an adaptive LMS filter receiver in a CDMA system has significantly better BER than that achieved by using a conventional matched filter receiver. With the addition of forward error correction capability this performance can be enhanced even more. In [1] we have shown that for K=6 users, and Npath=4 multipaths and PN sequence length N=127 with rate ½ convolutional code, one can achieve about 2 dB coding gain by using the adaptive LMS filter receiver in AWGN channel. In a Rayleigh fading channel, for the same parameters, one can achieve 7 dB coding gain. So, it is shown that by using adaptive LMS filter receiver instead of conventional matched filter receiver one can enhance the performance of the CDMA system.

In this paper we will calculate the resources needed to implement the adaptive LMS filter receiver for the CDMA system. There are four different architectures that we will look at: matched filter receiver, matched filter receiver with Viterbi decoder, LMS filter receiver, and LMS filter receiver with Viterbi decoder.

In the next few sections, we present several architectures used to implement the matched filter and LMS filter receiver models both with and without coding. These architectures are used to compare resource requirements for the four different models. All of the presented architectures assume fully parallel implementations. This is simply to provide an equivalent comparison. In this analysis we only look at the area required by each model. The parallel implementations have similar latency requirements for each model and will be analyzed in a future paper. Additional improvements to the area and throughput requirements for each architecture can be made by using bit-serial architectures [4] or by using pipelining [5], [6] or unfolding [7], [8].

Conventional Matched Filter Architecture

The conventional matched filter receiver structure for a CDMA receiver is shown in Fig.4. This is a parallel implementation of the conventional matched filter receiver. To compare the matched filter receiver architecture with the convolutionally coded CDMA system architecture, we need to define some parameters. We assume that the input signal width is a bits and the PN sequence chip width is b bits. Then the system in Fig.4 needs Naxb bit multipliers and (N-1)c bit adders. We will fix a, b, and c later in the paper. The superscripts are used throughout the paper to show the size of the adders and the multipliers.

Figure 4: Conventional matched filter receiver.

Adaptive LMS Filter Architecture

The LMS adaptive filter structure for a CDMA receiver is shown in Fig. 5. The purpose of the adaptive filter is to find the best tap weights, W's necessary to minimize the desired error, e. The error equation and the update equation of the LMS adaptive filter are defined as:


where

,

and

where Tb is the bit period, Tc is the chip period, and N is the processing gain defined as Tb/ Tc. As we can see from Fig.5, y is the input signal to the adaptive filter, and is the step-size parameter.

Figure 5&358; Parallel adaptive LMS filter architecture

We have chosen a parallel architecture for the LMS adaptive filter for the convolutionally coded adaptive CDMA receiver. The architecture of the filter is shown in Fig.5. The signal enters the system parallely and is correlated by the filter tap weights parallely. The outputs are added together to estimate the desired signal which is used to update the tap weights for the next bit. Here, we assume that the input signal width is d bits, filter coefficient width is e bits. The step size, , width is h bits. The error signal width is g bits. This architecture requires Ndxe+Nexi+1gxh multipliers and Ne+Nf adders. Later in the paper we will discuss the size of the overall architecture together with the decoder and adaptive filter for enhanced performance.

Hard Decision Viterbi Decoder

The hard decision Viterbi decoder architecture [9] is shown in Fig.6-8. This is a parallel hardware implementation of the Viterbi algorithm. Fig.6 shows the architecture of a branch metric unit (BMU). The BMU iteratively calculates the hamming distance between the received codewords and all possible codewords. The architecture for the BMU consists of 24 XOR gates, 8 AND gates, and 8 memory elements. The size of the BMU is fixed for a fixed encoder design. In our case we used a rate ½ convolutional encoder with generators 58 and 78. For a hard decision Viterbi decoder the size of the BMU is fixed and depends only on the number of states for the encoder and the number of possible outputs from each state. In our case the number of states is 4 and there are 2 possible outputs from each state.

Figure 6: Fully parallel branch metric unit

Figure 7: Add-Compare-Select Unit

Fig.7 shows the architecture of an add, compare and select unit (ACSU) for state 00. The size of the ACSU depends on the length of the trace back path that defines the size of the comparitor, the multiplexes, the registers and the adders. In our design we chose the trace back path to be 15. The encoder had L=3 memory elements, so the trace back path can be chosen as 5*L=15 which is sufficient to decode the received bits. The ACSU consists of 2 full adder (j bits), 2 comparators (j bits), 2 select units (2:1 2j bit multiplexer) and 2 storage elements of size 2j.

Figure 8: Fully parallel architecture of the ACS unit.

Fig.8 shows the parallel architecture for the ACS unit of the decoder. The total size of the ACSU is 4 times of that of the Fig.7. The fully parallel Viterbi decoder requires 9.5Ktransistors. This is quite small compared to the size of the matched filter and the LMS filter receiver.

Computation of the Receiver Size

In this section we will compare the size of the four proposed architectures for varying input wordlengths. We assume all implementations use fixed-point structures. We compute the BER rate versus the input wordlength for each structure using simulations. We compute the size versus the input wordlength of each structure through calculations. From this analysis we can determine the overhead necessary to achieve improved BERs with each structure.

To make these calculations, we assume b is implemented with 6 bits based on simulations. We vary the size of a and c in tandem. In Fig. 11, we simulate the effect of quantization errors to determine when they no longer affect the implementations. Clearly, a wordlength greater than 4 is required.

In Fig. 9 we show the affects of BER versus wordlength. The BER was determined using simulation. In Fig. 10 we show the size of the receiver structures versus wordlength. The size of the receiver structures is determined based on the analysis in Sections 3, 4 and 5. The gate count for each functional block has been translated to a transistor count assuming a CMOS implementation.

Clearly the LMS filter without coding provides substantial improvement over the matched filter. For example at a wordlength of a= 8 the BER rate for the matched filter is 0.03 and for LMS filter the BER is 0.0018. Thus the LMS filter provides an order of magnitude improvement. Meanwhile the size of the matched filter for a = 8 is 638 Ktransistors and for the LMS filter is 1304 Ktransistors that is only about twice the size.

With coding, the BER rate of the matched filter only improves slightly. However with coding the BER of the LMS filter can improve by another order of magnitude. However the size of the LMS filter with coding is only 2 times that of the matched filter implementation.

Figure 9: BER vs. word size for a CDMA system.

Figure 10: Receiver size vs. word length for four different architectures.

Figure 11: Signal to noise ratio at the output vs. number of quantization levels.

Conclusions

CDMA receiver structures are necessary for broadband communication systems. In this paper we have attempted to analyze the area overhead necessary to implement various CDMA receiver structures. An LMS filter receiver can provide an order of magnitude performance gain compared to a matched filter implementation. This comes at a cost of only a 2 times increase in area. Coding can be used to further improve the receiver performance. With coding, the matched filter receiver only improves by a small amount and does not justify the increase in area. However coding can improve the LMS filter receiver performance by another order of magnitude. This comes at a cost of only a 2 times increase in area. Future work will include the analysis of throughput for these filter structures.

References

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